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发表于 2022-8-6 16:02:34
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短接无数次 长短都试了
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
L0:00000000
L1:00000703
L2:00008267
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180
TE: 180612
BL2 Built : 10:15:09, Sep 5 2019. g12a ga536e8b - luan.yuan@droid15-sz
Board ID = 8
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 s
sd/emmc cmd 8 arg 0x00000000 status 01ff3000
DDR driver_vesion: LPDDR4_PHY_V_0_1_11 build time: Sep 5 2019 10:15:06
board id: 8
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, par t: 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
Cfg max: 5, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1200MHz
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : STREAM 0x0049000 - 0x0000000 0x0000000
INFO : STREAM 0x0402000 -
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 2. Board id: 255. Force loop cfg
DDR3 probe
ddr clk to 912MHz
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : STREAM 0x0067000 -
INFO : STREAM 0x0402000 -
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 3. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1392MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : STREAM 0x00b0000 - 0x0000100
INFO : STREAM 0x00a7000 - 0x0000001
INFO : STREAM 0x0054000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x0056000 - 0x0000000 0x0000000 0x0000100 0x0000000 0x0000000 0x0 0000ae
INFO : STREAM 0x005b000 - 0x0000000 0x0000005 0x000000a 0x0000003 0x0000000
INFO : STREAM 0x00a1000 -
INFO : STREAM 0x0402000 -
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 4. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 1392MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : STREAM 0x00b0000 - 0x0000100
INFO : STREAM 0x00a7000 - 0x0000001
INFO : STREAM 0x0054000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x0056000 - 0x0000000 0x0000000 0x0000100 0x0000000 0x0000000 0x0 0000ae
INFO : STREAM 0x005b000 - 0x0000000 0x0000005 0x000000a 0x0000003 0x0000000
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : STREAM 0x00b0000 - 0x0000100
INFO : STREAM 0x00a7000 - 0x0000001
INFO : STREAM 0x0054000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x0056000 - 0x0000000 0x0000000 0x0000031 0x0000000 0x0000000 0x0 0000ae
INFO : STREAM 0x005b000 - 0x0000000 0x0000005 0x000000a 0x0000003 0x0000000
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
Check phy result
INFO : STREAM 0x00b0000 - 0x0000100
INFO : STREAM 0x00a7000 - 0x0000001
INFO : STREAM 0x0054000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x0056000 - 0x0000000 0x0000000 0x0000001 0x0000000 0x0000000 0x0 0000ae
INFO : STREAM 0x005b000 - 0x0000000 0x0000005 0x000000a 0x0000003 0x0000000
INFO : End of initialization
INFO : End of write delay center optimization
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : STREAM 0x012c000 -
INFO : STREAM 0x0130000 - 0x0000100
INFO : STREAM 0x0127000 - 0x0000001
INFO : STREAM 0x00d4000 - 0x0000000 0x0000000 0x0000000
INFO : STREAM 0x00d6000 - 0x0000000 0x0000000 0x0000006 0x0000000 0x0000000 0x0 0000ae
INFO : STREAM 0x00db000 - 0x0000000 0x0000005 0x0000002 0x0000003 0x0000000
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
channel==0
RxClkDly_Margin_A0==78 ps 7
TxDqDly_Margin_A0==78 ps 7
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==79
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==19
DeviceVref_Margin_A0==35
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0
channel==1
RxClkDly_Margin_A0==89 ps 8
TxDqDly_Margin_A0==78 ps 7
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==80
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==18
DeviceVref_Margin_A0==34
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):000
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass
pre test bdlr_100_average==466 bdlr_100_min==466 bdlr_100_max==466 bdlr_100_c ur==466
aft test bdlr_100_average==466 bdlr_100_min==466 bdlr_100_max==466 bdlr_100_c ur==466
100bdlr_step_size ps== 472
result report
boot times 0ddr scramble enabled
Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, par t: 0
Load BL3X from eMMC, src: 0x0006c200, des: 0x0175c000, size: 0x00094000, part: 0
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12a_v1.1.3379-52d9d15 2019-08-12 20:43:08 luan.yuan@droid15-sz]
OPS=0x70
ring efuse init
28 0c 70 00 01 1f 38 00 00 09 31 34 39 41 48 50
[0.017910 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):e28bc7f
NOTICE: BL31: Built : 12:07:29, Jul 18 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast
<debug_uart>
U-Boot 2022.04-00910-gea5583b90f-dirty (Apr 22 2022 - 23:37:44 +0800) e900v22c
Model: Skyworth E900V22C Multimedia Box
SoC: Amlogic Meson G12A (Unknown) Revision 28:c (70:2)
DRAM: 2 GiB
Core: 375 devices, 20 uclasses, devicetree: separate
MMC: sd@ffe05000: 0, mmc@ffe07000: 1
Loading Environment from nowhere... OK
In: serial@3000
Out: serial@3000
Err: serial@3000
Net: eth0: ethernet@ff3f0000
Hit any key to stop autoboot: 0
=>
=> usb start
starting USB...
Bus usb@ff500000: Register 3000140 NbrPorts 3
Starting the controller
USB XHCI 1.10
scanning bus usb@ff500000 for devices... 2 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usbboot
** No device specified **
=>
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